731 lines
27 KiB
ArmAsm
731 lines
27 KiB
ArmAsm
/*
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AngelCode Scripting Library
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Copyright (c) 2003-2016 Andreas Jonsson
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any
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damages arising from the use of this software.
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Permission is granted to anyone to use this software for any
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purpose, including commercial applications, and to alter it and
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redistribute it freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you
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must not claim that you wrote the original software. If you use
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this software in a product, an acknowledgment in the product
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documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and
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must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source
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distribution.
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The original version of this library can be located at:
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http://www.angelcode.com/angelscript/
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Andreas Jonsson
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andreas@angelcode.com
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*/
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/*
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Assembly routines for the ARM call convention
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Written by Fredrik Ehnbom in June 2009
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Adapted to GNUC by darktemplar216 in September 2009
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Modified by Lasse Oorni for 8-byte stack alignment in May 2012
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The assembler routines for Linux were written by Carlos Luna in December 2012
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*/
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#if !defined(AS_MAX_PORTABILITY)
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#if defined(__arm__) || defined(__ARM__) || defined(I3D_ARCH_ARM)
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#if !defined(__linux__) || defined(__ANDROID__) || defined(ANDROID) || defined(__SOFTFP__)
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/* iOS, Android, Marmalade, and Linux with soft-float ABI goes here */
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.global armFunc
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.global armFuncR0
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.global armFuncR0R1
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.global armFuncObjLast
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.global armFuncR0ObjLast
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/* --------------------------------------------------------------------------------------------*/
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armFunc:
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stmdb sp!, {r4-r8, lr}
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r8, #0
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beq nomoreargs
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/* Load the first 4 arguments into r0-r3 */
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cmp r7, #4
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ldrge r0, [r6],#4
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cmp r7, #2*4
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ldrge r1, [r6],#4
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cmp r7, #3*4
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ldrge r2, [r6],#4
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cmp r7, #4*4
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ldrge r3, [r6],#4
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ble nomoreargs
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/* Load the rest of the arguments onto the stack */
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sub r7, r7, #4*4 /* skip the 4 registers already loaded into r0-r3 */
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add r8, r7, #4 /* ensure 8-byte stack alignment */
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bic r8, r8, #4
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sub sp, sp, r8
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mov r12, sp /* copy size != frame size, so store frame start sp */
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stackargsloop:
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ldr r5, [r6], #4
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str r5, [sp], #4
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subs r7, r7, #4
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bne stackargsloop
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mov sp, r12
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nomoreargs:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
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blx r4
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#endif
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add sp, sp, r8
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ldmia sp!, {r4-r8, pc}
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/* --------------------------------------------------------------------------------------------*/
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armFuncObjLast:
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stmdb sp!, {r4-r8, lr}
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r8, #0
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mov r0, r3 /* objlast. might get overwritten */
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mov r5, r3 /* objlast to temp reg */
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beq nomoreargsarmFuncObjLast
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/* Load the first 4 arguments into r0-r3 */
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cmp r7, #4
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ldrge r0, [r6],#4
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cmp r7, #2*4
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ldrge r1, [r6],#4
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movlt r1, r5
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cmp r7, #3*4
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ldrge r2, [r6],#4
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movlt r2, r5
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cmp r7, #4*4
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ldrge r3, [r6],#4
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movlt r3, r5
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blt nomoreargsarmFuncObjLast
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/* Load the rest of the arguments onto the stack */
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sub r7, r7, #4*4 /* skip the 4 registers already loaded into r0-r3 */
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add r8, r7, #8 /* account for the objlast pointer, ensure 8-byte stack alignment */
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bic r8, r8, #4
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str r5, [sp,#-4] /* store the objlast on stack, twice in case we adjusted alignment */
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str r5, [sp,#-8]
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sub sp, sp, r8 /* adjust frame */
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cmp r7, #0 /* we may also have come here with no extra params */
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beq nomoreargsarmFuncObjLast
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mov r12, sp /* copy size != frame size, so store frame start sp */
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stackargslooparmFuncObjLast:
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ldr r5, [r6], #4
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str r5, [sp], #4
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subs r7, r7, #4
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bne stackargslooparmFuncObjLast
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mov sp, r12
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nomoreargsarmFuncObjLast:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
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blx r4
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#endif
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add sp, sp, r8
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ldmia sp!, {r4-r8, pc}
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/* --------------------------------------------------------------------------------------------*/
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armFuncR0ObjLast:
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stmdb sp!, {r4-r8, lr}
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ldr r5, [sp,#6*4] /* objlast to temp reg */
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r8, #0
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mov r0, r3 /* r0 explicitly set */
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mov r1, r5 /* objlast. might get overwritten */
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beq nomoreargsarmFuncR0ObjLast
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/* Load the first 3 arguments into r1-r3 */
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cmp r7, #1*4
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ldrge r1, [r6],#4
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cmp r7, #2*4
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ldrge r2, [r6],#4
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movlt r2, r5
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cmp r7, #3*4
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ldrge r3, [r6],#4
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movlt r3, r5
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blt nomoreargsarmFuncR0ObjLast
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/* Load the rest of the arguments onto the stack */
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sub r7, r7, #3*4 /* skip the 3 registers already loaded into r1-r3 */
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add r8, r7, #8 /* account for the objlast pointer, ensure 8-byte stack alignment */
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bic r8, r8, #4
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str r5, [sp,#-4] /* store the objlast on stack, twice in case we adjusted alignment */
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str r5, [sp,#-8]
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sub sp, sp, r8 /* adjust frame */
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cmp r7, #0 /* we may also have come here with no extra params */
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beq nomoreargsarmFuncR0ObjLast
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mov r12, sp /* copy size != frame size, so store frame start sp */
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stackargslooparmFuncR0ObjLast:
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ldr r5, [r6], #4
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str r5, [sp], #4
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subs r7, r7, #4
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bne stackargslooparmFuncR0ObjLast
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mov sp, r12
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nomoreargsarmFuncR0ObjLast:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
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blx r4
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#endif
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add sp, sp, r8
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ldmia sp!, {r4-r8, pc}
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/* --------------------------------------------------------------------------------------------*/
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armFuncR0:
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stmdb sp!, {r4-r8, lr}
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r8, #0
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mov r0, r3 /* r0 explicitly set */
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beq nomoreargsarmFuncR0
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/* Load the first 3 arguments into r1-r3 */
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cmp r7, #1*4
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ldrge r1, [r6],#4
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cmp r7, #2*4
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ldrge r2, [r6],#4
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cmp r7, #3*4
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ldrge r3, [r6],#4
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ble nomoreargsarmFuncR0
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/* Load the rest of the arguments onto the stack */
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sub r7, r7, #3*4 /* skip the 3 registers already loaded into r1-r3 */
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add r8, r7, #4 /* ensure 8-byte stack alignment */
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bic r8, r8, #4
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sub sp, sp, r8
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mov r12, sp /* copy size != frame size, so store frame start sp */
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stackargslooparmFuncR0:
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ldr r5, [r6], #4
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str r5, [sp], #4
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subs r7, r7, #4
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bne stackargslooparmFuncR0
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mov sp, r12
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nomoreargsarmFuncR0:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
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blx r4
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#endif
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add sp, sp, r8
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ldmia sp!, {r4-r8, pc}
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/* --------------------------------------------------------------------------------------------*/
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armFuncR0R1:
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stmdb sp!, {r4-r8, lr}
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r8, #0
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mov r0, r3 /* r0 explicitly set */
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ldr r1, [sp, #6*4] /* r1 explicitly set too */
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beq nomoreargsarmFuncR0R1
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/* Load the first 2 arguments into r2-r3 */
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cmp r7, #1*4
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ldrge r2, [r6],#4
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cmp r7, #2*4
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ldrge r3, [r6],#4
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ble nomoreargsarmFuncR0R1
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/* Load the rest of the arguments onto the stack */
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sub r7, r7, #2*4 /* skip the 2 registers already loaded into r2-r3 */
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add r8, r7, #4 /* ensure 8-byte stack alignment */
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bic r8, r8, #4
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sub sp, sp, r8
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mov r12, sp /* copy size != frame size, so store frame start sp */
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stackargslooparmFuncR0R1:
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ldr r5, [r6], #4
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str r5, [sp], #4
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subs r7, r7, #4
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bne stackargslooparmFuncR0R1
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mov sp, r12
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nomoreargsarmFuncR0R1:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
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blx r4
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#endif
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add sp, sp, r8
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ldmia sp!, {r4-r8, pc}
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/* --------------------------------------------------------------------------------------------*/
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#elif defined(__linux__) && !defined(__SOFTFP__)
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/* The Linux with hard-float ABI code goes here */
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/* These codes are suitable for armeabi + vfp / armeabihf */
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/* when using armeabi + vfp, please set C_FLAGS -mfloat-abi=softfp -mfpu=vfp */
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/* using armeabihf, please set C_FLAGS -mfloat-abi=hard -mfpu=vfpv3-d16 */
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/* if you prefer to run in ARM mode, please add -marm to C_FLAGS */
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/* while using thumb mode, please add -mthumb -Wa,-mimplicit-it=thumb */
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/* SP is a multiple of 8 when control first enters a program.*/
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/* This places an obligation on authors of low level OS, RTOS, and runtime library code to align SP at all points */
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/* at which control first enters a body of (AAPCS-conforming) code. (please read "ARM IHI 0046B" document)*/
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.section .text
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.align 2 /* Align the function code to a 4-byte (2^n) word boundary. */
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#if defined(__thumb__) || defined(__thumb2__)
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.thumb
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.syntax unified
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#else
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.arm /* Use ARM instructions instead of Thumb.*/
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#endif
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.globl armFunc /* Make the function globally accessible.*/
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armFunc:
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push {r4-r8, r10, r11, lr} /* sp must be 8-byte alignment for ABI compliance, so the pushed registers must be even */
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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/* Load float and double args into d0-d7 and s0-s15 */
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add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
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mov r8, #0
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vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
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/* If there are no arguments to set into r0-r3 */
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/* go check if there are arguments for the stack */
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beq stackargs
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/* Load the first 4 arguments into r0-r3 */
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cmp r7, #4
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ldrge r0, [r6]
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cmp r7, #8
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ldrge r1, [r6, #4]
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cmp r7, #12
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ldrge r2, [r6, #8]
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cmp r7, #16
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ldrge r3, [r6, #12]
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stackargs:
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ldr r5, [r6, #268] /* Load stack size into r5 */
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movs r7, r5 /* Load stack size into r7, checking for 0 args */
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/* If there are no args for the stack, branch */
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beq nomoreargs
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/* Load the rest of the arguments onto the stack */
|
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/* Ensure 8-byte stack alignment */
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mov r8, sp
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sub sp, sp, r7
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add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
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|
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sub r12, sp, #8
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bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
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sub r8, r8, r12
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mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
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stackargsloop:
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ldr r5, [r6], #4
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subs r7, r7, #4
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str r5, [sp], #4
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bne stackargsloop
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mov sp, r12
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nomoreargs:
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#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
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mov lr, pc /* older ARM didn't support blx */
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mov pc, r4
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#else
|
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blx r4
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#endif
|
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add sp, sp, r8
|
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vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d7 to the address stored in r10 */
|
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|
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pop {r4-r8, r10, r11, pc}
|
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|
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/* --------------------------------------------------------------------------------------------*/
|
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.align 2 /* Align the function code to a 4-byte (2^n) word boundary. */
|
||
#if defined(__thumb__) || defined(__thumb2__)
|
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.thumb
|
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.syntax unified
|
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#else
|
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.arm /* Use ARM instructions instead of Thumb.*/
|
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#endif
|
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.globl armFuncObjLast /* Make the function globally accessible.*/
|
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armFuncObjLast:
|
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push {r4-r8, r10, r11, lr} /* We<EFBFBD>re storing r11 just to keep the stack aligned to an 8 byte boundary */
|
||
|
||
mov r6, r0 /* arg table */
|
||
movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
|
||
mov r4, r2 /* function address */
|
||
|
||
mov r0, r3 /* objlast. might get overwritten */
|
||
mov r5, #0 /* This will hold an offset of #4 only if objlast couldn<EFBFBD>t be placed into an "r" register */
|
||
|
||
/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
|
||
add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
|
||
mov r8, #0
|
||
vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
|
||
|
||
/* If there are no arguments to set into r0-r3 */
|
||
/* go check if there are arguments for the stack */
|
||
beq stackargsFuncObjLast
|
||
|
||
mov r5, r3 /* store objlast in r5 temporarily */
|
||
|
||
/* Load the first 4 arguments into r0-r3 */
|
||
cmp r7, #4
|
||
ldrge r0, [r6]
|
||
cmp r7, #8
|
||
ldrge r1, [r6,#4]
|
||
movlt r1, r5
|
||
cmp r7, #12
|
||
ldrge r2, [r6,#8]
|
||
movlt r2, r5
|
||
cmp r7, #16
|
||
ldrge r3, [r6,#12]
|
||
movlt r3, r5
|
||
movlt r5, #0 /* If objlast got placed into a register, r5 = 0 */
|
||
blt stackargsFuncObjLast /* If objlast got placed into a register, go to stackargsFuncObjLast */
|
||
|
||
str r5, [r6, #12] /* Put objlast in r6 + 12 */
|
||
mov r5, #4 /* Set r5 with an offset of #4, so objlast can be loaded into the stack */
|
||
|
||
stackargsFuncObjLast:
|
||
ldr r7, [r6, #268] /* Load stack size into r7 */
|
||
add r7, r7, r5 /* Add the offset placed in r5 (could be #0 or #4) */
|
||
cmp r7, #0 /* Check for 0 args */
|
||
|
||
/* If there are no args for the stack, branch */
|
||
beq nomoreargsarmFuncObjLast
|
||
|
||
/* Load the rest of the arguments onto the stack */
|
||
/* Ensure 8-byte stack alignment */
|
||
mov r8, sp
|
||
sub sp, sp, r7
|
||
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
||
|
||
sub r12, sp, #8
|
||
sub r6, r6, r5 /* r6 = r6 - r5 (r5 can be #0 or #4) */
|
||
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
||
sub r8, r8, r12
|
||
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
||
|
||
stackargslooparmFuncObjLast:
|
||
ldr r5, [r6], #4
|
||
subs r7, r7, #4
|
||
str r5, [sp], #4
|
||
bne stackargslooparmFuncObjLast
|
||
mov sp, r12
|
||
|
||
nomoreargsarmFuncObjLast:
|
||
#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
|
||
mov lr, pc /* older ARM didn't support blx */
|
||
mov pc, r4
|
||
#else
|
||
blx r4
|
||
#endif
|
||
add sp, sp, r8
|
||
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
||
|
||
pop {r4-r8, r10,r11, pc}
|
||
|
||
/* ------------------------------------------------------------------------------------------- */
|
||
.align 2 /* Align the function code to a 4-byte (2^n) word boundary. */
|
||
#if defined(__thumb__) || defined(__thumb2__)
|
||
.thumb
|
||
.syntax unified
|
||
#else
|
||
.arm /* Use ARM instructions instead of Thumb.*/
|
||
#endif
|
||
.globl armFuncR0ObjLast /* Make the function globally accessible.*/
|
||
armFuncR0ObjLast:
|
||
push {r4-r8, r10, r11, lr}
|
||
|
||
ldr r5, [sp,#32] /* objlast to temp reg */
|
||
|
||
mov r6, r0 /* arg table */
|
||
movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
|
||
mov r4, r2 /* function address */
|
||
|
||
mov r0, r3 /* r0 explicitly set */
|
||
mov r1, r5 /* objlast. might get overwritten */
|
||
mov r5, #0 /* This will hold an offset of #4 or #8 if objlast or one arg couldn<EFBFBD>t be placed into an "r" register */
|
||
|
||
/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
|
||
add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
|
||
mov r8, #0
|
||
vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
|
||
|
||
/* If there are no arguments to set into r0-r3 */
|
||
/* go check if there are arguments for the stack */
|
||
beq stackargsFuncR0ObjLast
|
||
|
||
mov r5, r1 /* store objlast in r5 temporarily */
|
||
|
||
/* Load the first 3 arguments into r1-r3 */
|
||
cmp r7, #4
|
||
ldrge r1, [r6]
|
||
cmp r7, #8
|
||
ldrge r2, [r6,#4]
|
||
movlt r2, r5
|
||
cmp r7, #12
|
||
ldrge r3, [r6,#8]
|
||
movlt r3, r5
|
||
movlt r5, #0 /* If objlast got placed into a register, r5 = 0 */
|
||
blt stackargsFuncR0ObjLast /* If objlast got placed into a register, go to stackargsFuncR0ObjLast */
|
||
|
||
cmp r7, #16 /* Else if we have one last arg set the offset accordingly and store the arg in the array */
|
||
ldrge r7, [r6, #12]
|
||
strge r7, [r6, #8]
|
||
|
||
str r5, [r6, #12] /* Put objlast in r6 + 12 */
|
||
mov r5, #0
|
||
|
||
movge r5, #4 /* Set r5 with an offset of #4 if there<EFBFBD>s one last arg that couldn<EFBFBD>t be placed in r registers */
|
||
add r5, r5, #4 /* Set r5 with an offset of + #4, so objlast can be loaded into the stack */
|
||
|
||
stackargsFuncR0ObjLast:
|
||
ldr r7, [r6, #268] /* Load stack size into r7 */
|
||
add r7, r7, r5 /* Add the offset placed in r5 (could be #0 or #4) */
|
||
cmp r7, #0 /* Check for 0 args */
|
||
|
||
/* If there are no args for the stack, branch */
|
||
beq nomoreargsarmFuncR0ObjLast
|
||
|
||
/* Load the rest of the arguments onto the stack */
|
||
/* Ensure 8-byte stack alignment */
|
||
mov r8, sp
|
||
sub sp, sp, r7
|
||
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
||
|
||
sub r12, sp, #8
|
||
sub r6, r6, r5 /* r6 = r6 - r5 (r5 can be #0 or #4) */
|
||
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
||
sub r8, r8, r12
|
||
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
||
|
||
stackargslooparmFuncR0ObjLast:
|
||
ldr r5, [r6], #4
|
||
subs r7, r7, #4
|
||
str r5, [sp], #4
|
||
bne stackargslooparmFuncR0ObjLast
|
||
mov sp, r12
|
||
|
||
nomoreargsarmFuncR0ObjLast:
|
||
#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
|
||
mov lr, pc /* older ARM didn't support blx */
|
||
mov pc, r4
|
||
#else
|
||
blx r4
|
||
#endif
|
||
add sp, sp, r8
|
||
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
||
|
||
pop {r4-r8, r10, r11, pc}
|
||
|
||
/* ------------------------------------------------------------------------------------------- */
|
||
.align 2 /* Align the function code to a 4-byte (2^n) word boundary. */
|
||
#if defined(__thumb__) || defined(__thumb2__)
|
||
.thumb
|
||
.syntax unified
|
||
#else
|
||
.arm /* Use ARM instructions instead of Thumb.*/
|
||
#endif
|
||
.globl armFuncR0 /* Make the function globally accessible.*/
|
||
armFuncR0:
|
||
push {r4-r8, r10, r11, lr}
|
||
|
||
mov r6, r0 /* arg table */
|
||
movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
|
||
mov r4, r2 /* function address */
|
||
mov r11, #0 /* This will hold an offset of #4 only if the last arg that should have been placed into an "r" reg needs to go to the stack */
|
||
mov r0, r3 /* r0 explicitly set */
|
||
|
||
/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
|
||
add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
|
||
mov r8, #0
|
||
vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
|
||
|
||
/* If there are no arguments to set into r0-r3 */
|
||
/* go check if there are arguments for the stack */
|
||
beq stackargsarmFuncR0
|
||
|
||
/* Load the first 3 arguments into r1-r3 */
|
||
cmp r7, #4
|
||
ldrge r1, [r6]
|
||
cmp r7, #8
|
||
ldrge r2, [r6, #4]
|
||
cmp r7, #12
|
||
ldrge r3, [r6, #8]
|
||
cmp r7, #16
|
||
movge r11, #4 /* If there is still one arg to be placed, set the offset in r11 to #4 */
|
||
|
||
stackargsarmFuncR0:
|
||
ldr r5, [r6, #268] /* Load stack size into r5 */
|
||
add r5, r11 /* Add the offset placed in r11 (could be #0 or #4) */
|
||
movs r7, r5 /* Load stack size into r7, checking for 0 args */
|
||
|
||
/* If there are no args for the stack, branch */
|
||
beq nomoreargsarmFuncR0
|
||
|
||
/* Load the rest of the arguments onto the stack */
|
||
/* Ensure 8-byte stack alignment */
|
||
mov r8, sp
|
||
sub sp, sp, r7
|
||
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
||
|
||
sub r12, sp, #8
|
||
sub r6, r6, r11 /* r6 = r6 - r11 (r11 can be #0 or #4) */
|
||
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
||
sub r8, r8, r12
|
||
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
||
|
||
stackargslooparmFuncR0:
|
||
ldr r5, [r6], #4
|
||
subs r7, r7, #4
|
||
str r5, [sp], #4
|
||
bne stackargslooparmFuncR0
|
||
mov sp, r12
|
||
|
||
nomoreargsarmFuncR0:
|
||
#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
|
||
mov lr, pc /* older ARM didn't support blx */
|
||
mov pc, r4
|
||
#else
|
||
blx r4
|
||
#endif
|
||
add sp, sp, r8
|
||
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
||
|
||
pop {r4-r8, r10, r11, pc}
|
||
|
||
/* ------------------------------------------------------------------------------------------- */
|
||
.align 2 /* Align the function code to a 4-byte (2^n) word boundary. */
|
||
#if defined(__thumb__) || defined(__thumb2__)
|
||
.thumb
|
||
.syntax unified
|
||
#else
|
||
.arm /* Use ARM instructions instead of Thumb.*/
|
||
#endif
|
||
.globl armFuncR0R1 /* Make the function globally accessible.*/
|
||
armFuncR0R1:
|
||
push {r4-r8, r10, r11, lr}
|
||
|
||
mov r6, r0 /* arg table */
|
||
movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
|
||
mov r4, r2 /* function address */
|
||
mov r11, #0 /* This will hold an offset of #4 or #8 only if the last arg (or last 2 args) that should have been placed into "r" regs need to go to the stack */
|
||
|
||
mov r0, r3 /* r0 explicitly set */
|
||
ldr r1, [sp, #32] /* r1 explicitly set too */
|
||
|
||
/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
|
||
add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
|
||
mov r8, #0
|
||
vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
|
||
|
||
/* If there are no arguments to set into r2-r3 */
|
||
/* go check if there are arguments for the stack */
|
||
beq stackargsarmFuncR0R1
|
||
|
||
/* Load the first 2 arguments into r2-r3 */
|
||
cmp r7, #4
|
||
ldrge r2, [r6]
|
||
cmp r7, #8
|
||
ldrge r3, [r6, #4]
|
||
cmp r7, #12
|
||
movge r11, #4 /* If there is a third arg to be placed, set the offset in r11 to #4 */
|
||
cmp r7, #16
|
||
movge r11, #8 /* If there is a fourth arg to be placed, set the offset in r11 to #8 */
|
||
ldrlt r7, [r6, #8] /* Else copy the third arg to the correct place in the array */
|
||
strlt r7, [r6, #12]
|
||
|
||
stackargsarmFuncR0R1:
|
||
ldr r5, [r6, #268] /* Load stack size into r5 */
|
||
add r5, r11 /* Add the offset placed in r11 (could be #0 or #4 or #8) */
|
||
movs r7, r5 /* Load stack size into r7, checking for 0 args */
|
||
|
||
/* If there are no args for the stack, branch */
|
||
beq nomoreargsarmFuncR0R1
|
||
|
||
/* Load the rest of the arguments onto the stack */
|
||
/* Ensure 8-byte stack alignment */
|
||
mov r8, sp
|
||
sub sp, sp, r7
|
||
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
||
|
||
sub r12, sp, #8
|
||
sub r6, r6, r11 /* r6 = r6 - r11 (r11 can be #0 or #4 or #8) */
|
||
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
||
sub r8, r8, r12
|
||
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
||
|
||
stackargslooparmFuncR0R1:
|
||
ldr r5, [r6], #4
|
||
subs r7, r7, #4
|
||
str r5, [sp], #4
|
||
bne stackargslooparmFuncR0R1
|
||
mov sp, r12
|
||
|
||
nomoreargsarmFuncR0R1:
|
||
#if defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_4__)
|
||
mov lr, pc /* older ARM didn't support blx */
|
||
mov pc, r4
|
||
#else
|
||
blx r4
|
||
#endif
|
||
add sp, sp, r8
|
||
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
||
|
||
pop {r4-r8, r10, r11, pc}
|
||
|
||
#endif /* hard float abi */
|
||
|
||
#endif /* arm */
|
||
|
||
#if defined(__linux__) && defined(__ELF__)
|
||
/* ref: http://hardened.gentoo.org/gnu-stack.xml
|
||
ref: https://wiki.gentoo.org/wiki/Hardened/GNU_stack_quickstart */
|
||
.section .note.GNU-stack,"",%progbits
|
||
#endif
|
||
|
||
#endif /* !AS_MAX_PORTABILITY */
|
||
|
||
|