486 lines
16 KiB
ArmAsm
486 lines
16 KiB
ArmAsm
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/*
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AngelCode Scripting Library
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Copyright (c) 2003-2015 Andreas Jonsson
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any
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damages arising from the use of this software.
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Permission is granted to anyone to use this software for any
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purpose, including commercial applications, and to alter it and
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redistribute it freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you
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must not claim that you wrote the original software. If you use
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this software in a product, an acknowledgment in the product
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documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and
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must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source
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distribution.
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The original version of this library can be located at:
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http://www.angelcode.com/angelscript/
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Andreas Jonsson
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andreas@angelcode.com
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*/
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/*
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Assembly routines for the Playstation Vita SNC call convention.
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This code was adapted from as_callfunc_arm_gcc (ARM, Linux hard float) by Brandon Bare on October 2014.
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*/
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#if !defined(AS_MAX_PORTABILITY)
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#ifdef __psp2__
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.syntax unified
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.cpu cortex-a9
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.fpu neon
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.section .text.armCallFunc
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.balign 2
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.thumb
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.thumb_func
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.align 2
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.global armFunc
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.global armFuncR0
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.global armFuncR0R1
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.global armFuncObjLast
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.global armFuncR0ObjLast
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.type armFunc, %function
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.type armFuncR0, %function
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.type armFuncR0R1, %function
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.type armFuncObjLast, %function
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.type armFuncR0ObjLast, %function
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/* --------------------------------------------------------------------------------------------*/
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armFunc:
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.fnstart
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push {r4-r8, r10, r11, lr} /* sp must be 8-byte alignment for ABI compliance, so the pushed registers must be even */
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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/* Load float and double args into d0-d7 and s0-s15 */
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add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
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mov r8, #0
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vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
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/* If there are no arguments to set into r0-r3 */
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/* go check if there are arguments for the stack */
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beq stackargs
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/* Load the first 4 arguments into r0-r3 */
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cmp r7, #4
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it ge
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ldrge r0, [r6]
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cmp r7, #8
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it ge
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ldrge r1, [r6, #4]
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cmp r7, #12
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it ge
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ldrge r2, [r6, #8]
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cmp r7, #16
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it ge
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ldrge r3, [r6, #12]
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stackargs:
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ldr r5, [r6, #268] /* Load stack size into r5 */
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movs r7, r5 /* Load stack size into r7, checking for 0 args */
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/* If there are no args for the stack, branch */
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beq nomoreargs
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/* Load the rest of the arguments onto the stack */
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/* Ensure 8-byte stack alignment */
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mov r8, sp
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sub sp, sp, r7
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add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
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sub r12, sp, #8
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bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
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sub r8, r8, r12
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mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
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stackargsloop:
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ldr r5, [r6], #4
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subs r7, r7, #4
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str r5, [sp], #4
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bne stackargsloop
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mov sp, r12
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nomoreargs:
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blx r4
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add sp, sp, r8
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vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d7 to the address stored in r10 */
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pop {r4-r8, r10, r11, pc}
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.fnend
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/* --------------------------------------------------------------------------------------------*/
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armFuncObjLast:
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.fnstart
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push {r4-r8, r10, r11, lr} /* We<EFBFBD>re storing r11 just to keep the stack aligned to an 8 byte boundary */
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r0, r3 /* objlast. might get overwritten */
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mov r5, #0 /* This will hold an offset of #4 only if objlast couldn<EFBFBD>t be placed into an "r" register */
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/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
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add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
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mov r8, #0
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vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
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/* If there are no arguments to set into r0-r3 */
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/* go check if there are arguments for the stack */
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beq stackargsFuncObjLast
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mov r5, r3 /* store objlast in r5 temporarily */
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/* Load the first 4 arguments into r0-r3 */
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cmp r7, #4
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it ge
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ldrge r0, [r6]
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cmp r7, #8
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it ge
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ldrge r1, [r6,#4]
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it lt
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movlt r1, r5
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cmp r7, #12
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it ge
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ldrge r2, [r6,#8]
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it lt
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movlt r2, r5
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cmp r7, #16
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it ge
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ldrge r3, [r6,#12]
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ittt lt
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movlt r3, r5
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movlt r5, #0 /* If objlast got placed into a register, r5 = 0 */
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blt stackargsFuncObjLast /* If objlast got placed into a register, go to stackargsFuncObjLast */
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str r5, [r6, #12] /* Put objlast in r6 + 12 */
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mov r5, #4 /* Set r5 with an offset of #4, so objlast can be loaded into the stack */
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stackargsFuncObjLast:
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ldr r7, [r6, #268] /* Load stack size into r7 */
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add r7, r7, r5 /* Add the offset placed in r5 (could be #0 or #4) */
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cmp r7, #0 /* Check for 0 args */
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/* If there are no args for the stack, branch */
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beq nomoreargsarmFuncObjLast
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/* Load the rest of the arguments onto the stack */
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/* Ensure 8-byte stack alignment */
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mov r8, sp
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sub sp, sp, r7
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add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
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sub r12, sp, #8
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sub r6, r6, r5 /* r6 = r6 - r5 (r5 can be #0 or #4) */
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bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
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sub r8, r8, r12
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mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
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stackargslooparmFuncObjLast:
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ldr r5, [r6], #4
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subs r7, r7, #4
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str r5, [sp], #4
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bne stackargslooparmFuncObjLast
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mov sp, r12
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nomoreargsarmFuncObjLast:
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blx r4
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add sp, sp, r8
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vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
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pop {r4-r8, r10,r11, pc}
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.fnend
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/* --------------------------------------------------------------------------------------------*/
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armFuncR0ObjLast:
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.fnstart
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push {r4-r8, r10, r11, lr}
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ldr r5, [sp,#32] /* objlast to temp reg */
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r0, r3 /* r0 explicitly set */
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mov r1, r5 /* objlast. might get overwritten */
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mov r5, #0 /* This will hold an offset of #4 or #8 if objlast or one arg couldn<EFBFBD>t be placed into an "r" register */
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/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
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add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
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mov r8, #0
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vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
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/* If there are no arguments to set into r0-r3 */
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/* go check if there are arguments for the stack */
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beq stackargsFuncR0ObjLast
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mov r5, r1 /* store objlast in r5 temporarily */
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/* Load the first 3 arguments into r1-r3 */
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cmp r7, #4
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it ge
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ldrge r1, [r6]
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cmp r7, #8
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it ge
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ldrge r2, [r6,#4]
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it lt
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movlt r2, r5
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cmp r7, #12
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it ge
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ldrge r3, [r6,#8]
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ittt lt
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movlt r3, r5
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movlt r5, #0 /* If objlast got placed into a register, r5 = 0 */
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blt stackargsFuncR0ObjLast /* If objlast got placed into a register, go to stackargsFuncR0ObjLast */
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cmp r7, #16 /* Else if we have one last arg set the offset accordingly and store the arg in the array */
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itt ge
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ldrge r7, [r6, #12]
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strge r7, [r6, #8]
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str r5, [r6, #12] /* Put objlast in r6 + 12 */
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mov r5, #0
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it ge
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movge r5, #4 /* Set r5 with an offset of #4 if there<EFBFBD>s one last arg that couldn<EFBFBD>t be placed in r registers */
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add r5, r5, #4 /* Set r5 with an offset of + #4, so objlast can be loaded into the stack */
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stackargsFuncR0ObjLast:
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ldr r7, [r6, #268] /* Load stack size into r7 */
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add r7, r7, r5 /* Add the offset placed in r5 (could be #0 or #4) */
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cmp r7, #0 /* Check for 0 args */
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/* If there are no args for the stack, branch */
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beq nomoreargsarmFuncR0ObjLast
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/* Load the rest of the arguments onto the stack */
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/* Ensure 8-byte stack alignment */
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mov r8, sp
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sub sp, sp, r7
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add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
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sub r12, sp, #8
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sub r6, r6, r5 /* r6 = r6 - r5 (r5 can be #0 or #4) */
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bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
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sub r8, r8, r12
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mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
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stackargslooparmFuncR0ObjLast:
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ldr r5, [r6], #4
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subs r7, r7, #4
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str r5, [sp], #4
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bne stackargslooparmFuncR0ObjLast
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mov sp, r12
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nomoreargsarmFuncR0ObjLast:
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blx r4
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add sp, sp, r8
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vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
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pop {r4-r8, r10, r11, pc}
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.fnend
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/* --------------------------------------------------------------------------------------------*/
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armFuncR0:
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.fnstart
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push {r4-r8, r10, r11, lr}
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mov r6, r0 /* arg table */
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movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
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mov r4, r2 /* function address */
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mov r11, #0 /* This will hold an offset of #4 only if the last arg that should have been placed into an "r" reg needs to go to the stack */
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mov r0, r3 /* r0 explicitly set */
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/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
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add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
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mov r8, #0
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vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
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/* If there are no arguments to set into r0-r3 */
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/* go check if there are arguments for the stack */
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beq stackargsarmFuncR0
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/* Load the first 3 arguments into r1-r3 */
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cmp r7, #4
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|
|||
|
|
it ge
|
|||
|
|
ldrge r1, [r6]
|
|||
|
|
cmp r7, #8
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
ldrge r2, [r6, #4]
|
|||
|
|
cmp r7, #12
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
ldrge r3, [r6, #8]
|
|||
|
|
cmp r7, #16
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
movge r11, #4 /* If there is still one arg to be placed, set the offset in r11 to #4 */
|
|||
|
|
|
|||
|
|
stackargsarmFuncR0:
|
|||
|
|
ldr r5, [r6, #268] /* Load stack size into r5 */
|
|||
|
|
add r5, r11 /* Add the offset placed in r11 (could be #0 or #4) */
|
|||
|
|
movs r7, r5 /* Load stack size into r7, checking for 0 args */
|
|||
|
|
|
|||
|
|
/* If there are no args for the stack, branch */
|
|||
|
|
beq nomoreargsarmFuncR0
|
|||
|
|
|
|||
|
|
/* Load the rest of the arguments onto the stack */
|
|||
|
|
/* Ensure 8-byte stack alignment */
|
|||
|
|
mov r8, sp
|
|||
|
|
sub sp, sp, r7
|
|||
|
|
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
|||
|
|
|
|||
|
|
sub r12, sp, #8
|
|||
|
|
sub r6, r6, r11 /* r6 = r6 - r11 (r11 can be #0 or #4) */
|
|||
|
|
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
|||
|
|
sub r8, r8, r12
|
|||
|
|
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
|||
|
|
|
|||
|
|
stackargslooparmFuncR0:
|
|||
|
|
ldr r5, [r6], #4
|
|||
|
|
subs r7, r7, #4
|
|||
|
|
str r5, [sp], #4
|
|||
|
|
bne stackargslooparmFuncR0
|
|||
|
|
mov sp, r12
|
|||
|
|
|
|||
|
|
nomoreargsarmFuncR0:
|
|||
|
|
blx r4
|
|||
|
|
add sp, sp, r8
|
|||
|
|
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
|||
|
|
|
|||
|
|
pop {r4-r8, r10, r11, pc}
|
|||
|
|
|
|||
|
|
.fnend
|
|||
|
|
|
|||
|
|
/* --------------------------------------------------------------------------------------------*/
|
|||
|
|
armFuncR0R1:
|
|||
|
|
.fnstart
|
|||
|
|
|
|||
|
|
push {r4-r8, r10, r11, lr}
|
|||
|
|
|
|||
|
|
mov r6, r0 /* arg table */
|
|||
|
|
movs r7, r1 /* arg size (also set the condition code flags so that we detect if there are no arguments) */
|
|||
|
|
mov r4, r2 /* function address */
|
|||
|
|
mov r11, #0 /* This will hold an offset of #4 or #8 only if the last arg (or last 2 args) that should have been placed into "r" regs need to go to the stack */
|
|||
|
|
|
|||
|
|
mov r0, r3 /* r0 explicitly set */
|
|||
|
|
ldr r1, [sp, #32] /* r1 explicitly set too */
|
|||
|
|
|
|||
|
|
/* Load float and double args into d0-d7 and s0-s15 (r10 holds pointer to first float value) */
|
|||
|
|
add r10, r6, #272 /* r10 (r6 + 272) points to the first value for the VFP registers */
|
|||
|
|
mov r8, #0
|
|||
|
|
vldmia.64 r10, {d0-d7} /* Load contents starting at r10 into registers d0-d7 */
|
|||
|
|
|
|||
|
|
/* If there are no arguments to set into r2-r3 */
|
|||
|
|
/* go check if there are arguments for the stack */
|
|||
|
|
beq stackargsarmFuncR0R1
|
|||
|
|
|
|||
|
|
/* Load the first 2 arguments into r2-r3 */
|
|||
|
|
cmp r7, #4
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
ldrge r2, [r6]
|
|||
|
|
cmp r7, #8
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
ldrge r3, [r6, #4]
|
|||
|
|
cmp r7, #12
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
movge r11, #4 /* If there is a third arg to be placed, set the offset in r11 to #4 */
|
|||
|
|
|
|||
|
|
cmp r7, #16
|
|||
|
|
|
|||
|
|
it ge
|
|||
|
|
movge r11, #8 /* If there is a fourth arg to be placed, set the offset in r11 to #8 */
|
|||
|
|
|
|||
|
|
itt lt
|
|||
|
|
ldrlt r7, [r6, #8] /* Else copy the third arg to the correct place in the array */
|
|||
|
|
strlt r7, [r6, #12]
|
|||
|
|
|
|||
|
|
stackargsarmFuncR0R1:
|
|||
|
|
ldr r5, [r6, #268] /* Load stack size into r5 */
|
|||
|
|
add r5, r11 /* Add the offset placed in r11 (could be #0 or #4 or #8) */
|
|||
|
|
movs r7, r5 /* Load stack size into r7, checking for 0 args */
|
|||
|
|
|
|||
|
|
/* If there are no args for the stack, branch */
|
|||
|
|
beq nomoreargsarmFuncR0R1
|
|||
|
|
|
|||
|
|
/* Load the rest of the arguments onto the stack */
|
|||
|
|
/* Ensure 8-byte stack alignment */
|
|||
|
|
mov r8, sp
|
|||
|
|
sub sp, sp, r7
|
|||
|
|
add r6, r6, #16 /* Set r6 to point to the first arg to be placed on the stack */
|
|||
|
|
|
|||
|
|
sub r12, sp, #8
|
|||
|
|
sub r6, r6, r11 /* r6 = r6 - r11 (r11 can be #0 or #4 or #8) */
|
|||
|
|
bic r12, r12, #7 /* thumb mode couldn't support "bic sp, sp, #7" instruction */
|
|||
|
|
sub r8, r8, r12
|
|||
|
|
mov sp, r12 /* copy size != frame size, so store frame start sp, r12(ip) is not callee saved register */
|
|||
|
|
|
|||
|
|
stackargslooparmFuncR0R1:
|
|||
|
|
ldr r5, [r6], #4
|
|||
|
|
subs r7, r7, #4
|
|||
|
|
str r5, [sp], #4
|
|||
|
|
bne stackargslooparmFuncR0R1
|
|||
|
|
mov sp, r12
|
|||
|
|
|
|||
|
|
nomoreargsarmFuncR0R1:
|
|||
|
|
blx r4
|
|||
|
|
add sp, sp, r8
|
|||
|
|
vstmia.64 r10, {d0-d7} /* Copy contents of registers d0-d10 to the address stored in r10 */
|
|||
|
|
|
|||
|
|
pop {r4-r8, r10, r11, pc}
|
|||
|
|
|
|||
|
|
.fnend
|
|||
|
|
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
#endif /* !AS_MAX_PORTABILITY */
|
|||
|
|
|